diff --git a/main.c b/main.c index ab596f1..4437bf9 100644 --- a/main.c +++ b/main.c @@ -8,6 +8,7 @@ #include #include #include +#include // Configuration bits #pragma config FOSC = INTOSC // Oscillator Selection bits (INTOSC oscillator: I/O function on CLKIN pin) @@ -24,8 +25,8 @@ // Pins define #define DHT22_PIN_DIR TRISAbits.TRISA4 #define DHT22_DATA PORTAbits.RA4 -#define CTRL_1 PORTAbits.RA5 -#define CTRL_2 PORTAbits.RA2 +#define CTRL_1 PORTAbits.RA5 // Water heating - 7x27Ohm = 6.5W +#define CTRL_2 PORTAbits.RA2 // Air heating - 10x100Ohm = 2.5W // Clock frequency (used for __delay_xx) #define _XTAL_FREQ 8000000 @@ -42,11 +43,12 @@ int readDHT() { } // Wait for an old payload eventually aborted to end (lasts about 4ms) - __delay_ms(5); + __delay_ms(100); // Sends the start signal: low for at least 1ms, then high for 20 to 40us + LATAbits.LATA4 = 0; // LATA4?should stay at 0, but it gets back to 1 idk why. DHT22_PIN_DIR = 0; // configure as output, then set it as 0 (= LATAbits.LATA4). - __delay_ms(2); + __delay_ms(20); DHT22_PIN_DIR = 1; // configure as input, then set it as 1 (through pullup). __delay_us(40); @@ -60,9 +62,7 @@ int readDHT() { for (uint8_t n = 0; n < 5; n++) { for (int8_t i = 7; i >= 0; i--) { waitDHTOrRet(1); // Wait for up - CTRL_1 = 1; waitDHTOrRet(0); // Wait for low. Waited time is TMR0. - CTRL_1 = 0; if (TMR0 > 50) { // Low: 26-28us High: 70us dhtBytes[n] |= 1 << i; @@ -95,6 +95,25 @@ int fetchClimate(int8_t* humidity, int8_t* temperature) { return 0; } +#define __delay_s(s) {uint8_t __delay_s_i = (s); while(__delay_s_i > 0){ __delay_s_i--; __delay_ms(1000); }} + +void heat1(uint8_t rate) { + CTRL_1 = 1; + uint8_t delay_on = rate / 16; // Total elapsed time is 16s + __delay_s(delay_on); + CTRL_1 = 0; + uint8_t delay_off = 16 - rate/16; + __delay_s(delay_off); +} +void heat2(uint8_t rate) { + CTRL_2 = 1; + uint8_t delay_on = rate / 4; // Total elapsed time is 32s + __delay_s(delay_on); + CTRL_2 = 0; + uint8_t delay_off = 32 - rate/4; + __delay_s(delay_off); +} + void main() { // 8MHz internal clock OSCCON = 0b01110000; @@ -104,22 +123,58 @@ void main() { ANSELA = 0b00000011; // Declare used pins as digital I/O (bit = 0) WPUA = 0b00010000; // Active la résistance de pull-up sur RA4 LATAbits.LATA4 = 0; // Declare RA4 output value as 0 (only effective when DHT22_PIN_DIR = 0) - + CTRL_1 = 0; + CTRL_2 = 0; + APFCONbits.T1GSEL = 1; // Prevent T1G function to be assigned to RA4. + // Timer 0 config OPTION_REGbits.PSA = 0; // Enable prescaler OPTION_REGbits.PS = 0b000; // 1/2 prescaler OPTION_REGbits.TMR0CS = 0; // Use internal clock OPTION_REGbits.TMR0SE = 0; // Increment on rising edge + // PWM config +// PWM2CON = 0b00000000; // Module enable - Output enable - Output state 0 (off) - Output active state is high - Standard PWM mode +// PWM2CLKCON = 0b01110000; // - Divide source clock by 128 -> 62500Hz - - FOSC clock source +// PWM2PRH = 0xff; // Count to 65535 -> 1Hz full loop +// PWM2PRL = 0xff; +// PWM2PHH = 0; // No phase count +// PWM2PHL = 0; +// PWM2OFH = 0; // No offset +// PWM2OFL = 0; +// PWM2DCH = 0; // Comparator set to 0 -> always off +// PWM2DCL = 0; +// APFCONbits.P1SEL = 1; // PWM1 on RA5 + // PWM is not working. + + // Target (except from nov. to feb.: 15°): + // temp = 24 to 28° + // hum = 60 to 80% + int8_t hum_target = ((int8_t) 80); + int8_t temp_target = ((int8_t) 30); while (1) { int8_t hum = 0; int8_t temp = 0; int is_error = fetchClimate(&hum, &temp); + __delay_ms(100); if(is_error){ - __delay_ms(5000); + // Reconfigure DHT as output to clean it up at 0v +// DHT22_PIN_DIR = 0; +// LATAbits.LATA4 = 0; + LATAbits.LATA4 = 0; + __delay_ms(1000); + }else{ + if(hum < hum_target){ + heat1(128); + }else if(temp < temp_target){ + heat2(128); + }else { + __delay_ms(5000); + } } - __delay_ms(200); +// PWM2DCH = 128; // 50% power +// PWM2DCL = 128; // 50% power } } diff --git a/nbproject/Makefile-genesis.properties b/nbproject/Makefile-genesis.properties index 8f52f1d..b3f802a 100644 --- a/nbproject/Makefile-genesis.properties +++ b/nbproject/Makefile-genesis.properties @@ -1,11 +1,11 @@ # -#Mon Jul 14 17:21:30 CEST 2025 +#Tue Jul 22 22:58:06 CEST 2025 default.languagetoolchain.version=3.00 default.Pack.dfplocation=/Applications/microchip/mplabx/v6.20/packs/Microchip/PIC12-16F1xxx_DFP/1.7.242 conf.ids=default default.languagetoolchain.dir=/Applications/microchip/xc8/v3.00/bin host.id=25fg-hcwv-jy -configurations-xml=9fb44f5d96dce8dab3ba2eb3b9104ff9 +configurations-xml=5faac1ea7a32d072accfd4e5449880c6 default.com-microchip-mplab-mdbcore-PICKit3Tool-PICkit3DbgToolManager.md5=5b9902b017a30efdeb77dee75a1e4e51 com-microchip-mplab-nbide-embedded-makeproject-MakeProject.md5=f612087c95360c842296d189edfe3321 default.com-microchip-mplab-nbide-toolchain-xc8-XC8LanguageToolchain.md5=bf89cdcdd6c0a49174fe4b605ef2b42d diff --git a/nbproject/configurations.xml b/nbproject/configurations.xml index 16401a9..57261f0 100644 --- a/nbproject/configurations.xml +++ b/nbproject/configurations.xml @@ -172,7 +172,7 @@ value="${memories.instruction.ram.ranges}"/> - + @@ -220,7 +220,7 @@ value="${memories.instruction.ram.ranges}"/> - +